PhaseLink PLL702-02 Low EMI Peripheral Clock Generator Datasheet

This product is a low EMI peripheral clock generator that can be used in notebooks and motherboards.


PhaseLink PLL702-02 Low EMI Peripheral Clock Generator Datasheet - cover page
Brand
PhaseLink
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
7
File format
PDF
File size
316 KB
Published
05 June, 2012
Updated
30 September, 2023
MD5 checksum
273A8B0E87818B2548EEAE521372C28D

About this manual

The PhaseLink PLL702-02 is a Low EMI Peripheral Clock Generator designed to replace multiple crystals and oscillators on Notebooks and Motherboards. It supports various frequency outputs including 27MHz, 14.318MHz, 24.576MHz, 12MHz, 10MHz, and 8MHz.

The device features selectable crystal input (24.576MHz or 14.318MHz) with an accuracy requirement of +/- 20ppm. It offers less than 10ppm frequency synthesis error to meet AC97, IEEE1394, IEEE802, and USB2.0 specifications. The chip is available in 16-Pin SOIC or TSSOP packages.

What's inside

  • FEATURES
  • PIN ASSIGNMENT
  • POWER GROUPS
  • FUNCTIONAL DESCRIPTION
  • Electrical Specifications
  • Absolute Maximum Ratings
  • AC Specifications
  • DC Specifications

Specifications

Operating Voltage3.3V (Nominal)
Supply Current (No Load)17 mA
Short-circuit Current+100 mA
Output Rise Time (No load)1.5 ns
Max. Absolute Period Jitter150 ps

Frequently asked questions

What crystal input frequencies are supported?

The device accepts either a 24.576MHz or 14.318MHz fundamental crystal.

What is the frequency synthesis error?

The device provides less than 10ppm Frequency Synthesis error.

Which packages are available for the PLL702-02?

The device is available in 16-Pin SOIC or TSSOP.

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