Elpida EDS6432AFBH & EDS6432CFBH 64M‑bit SDRAM Datasheet

This is a technical datasheet of Elpida Memory EDS6432AFBH, EDS6432CFBH 64M bits SDRAM


Elpida EDS6432AFBH & EDS6432CFBH 64M‑bit SDRAM Datasheet - cover page
Brand
ELPIDA
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
49
File format
PDF
File size
714 KB
Published
05 June, 2012
Updated
30 September, 2023
MD5 checksum
D341B34447795144C7A29D50A5157CA7

About this manual

The EDS6432AFBH and EDS6432CFBH are 64‑Mbit SDRAMs organized as 2 M words × 32 bits with four independent banks. They operate with a single‑ended clock and support burst read/write operations.

Key features include selectable supply voltages (3.3 V or 2.5 V), maximum clock frequencies of 166 MHz/133 MHz, programmable burst lengths and CAS latencies, and a 90‑ball FBGA package that complies with RoHS.

What's inside

  • Description
  • Features
  • Pin Configurations
  • Ordering Information
  • Electrical Specifications
  • Block Diagram
  • Pin Function
  • Command Operation
  • Power‑up Sequence
  • Timing Waveforms

Specifications

Supply Voltage3.3 V (AF) / 2.5 V (CF)
Maximum Clock Frequency166 MHz (AF) / 133 MHz (CF)
Organizationx32, 4 banks
Bank Operation4 banks can operate simultaneously and independently
Burst Length Options1, 2, 4, 8, full page
CAS Latency Options2, 3
Package90‑ball FBGA, lead‑free Sn‑Ag‑Cu
Operating Temperature0 °C to +70 °C
Power Dissipation1.0 W

Frequently asked questions

What supply voltages are required for the EDS6432AFBH and EDS6432CFBH?

The EDS6432AFBH operates at 3.3 V, while the EDS6432CFBH operates at 2.5 V.

What is the maximum clock frequency for each device?

The AF version supports up to 166 MHz and the CF version up to 133 MHz.

How many banks does the SDRAM have and can they operate independently?

The SDRAM contains four banks that can operate simultaneously and independently.

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