This document describes the power consumption of S1D13506. It includes the power consumption of input clock frequency (CLKI/CLKI2), CPU interface, LCD driver, CRT driver, D/A converter and backlight power supply.
The application note explains how the power consumption of the Epson S1D13506 controller varies with system design variables such as input clock frequency, CPU interface, Vpp voltage, display mode, internal clock division, and DRAM refresh mode. It includes example test conditions and a table of measured power values for different display configurations.
Key variables influencing consumption are described, and a power‑save mode that disables clocks and uses self‑refresh DRAM is presented. The document provides example power figures for typical LCD, CRT, and TV configurations.
| Vpop voltage | 3.3 V |
|---|---|
| BUSCLK frequency | 8 MHz |
| Input clock (CLKI) | 6 MHz |
| LCD panel refresh rate | 60 Hz |
Power consumption is affected by input clock frequency, CPU interface (BUSCLK), Vpp voltage level, display mode (resolution and color depth), internal clock divide, DRAM refresh mode, and clock states during power‑save mode.
By disabling clocks and using self‑refresh DRAM, the controller can achieve substantial power savings.
Under the listed test conditions the active‑mode power consumption is about 96.89 mW.