CAT1024, CAT1025 are complete memory and supervisory solutions for microcontroller-based systems. A 2k-bit serial EEPROM memory and a system power supervisor with brown-out protection are integrated together in low power CMOS techno-logy. Memory interface is via a 400kHz I2C bus. The CAT1025 provides a precision VCC sense circuit and two open drain outputs: one (RESET) drives high and the other (RESET) drives low whenever VCC falls below the reset threshold voltage. The CAT1025 also has a Write Protect input (WP). Write operations are disabled if WP is connected to a logic high. The CAT1024 also provides a precision VCC sense circuit, but has only a RESET output and does not have a Write Protect input.
This manual describes the CAT1024 and CAT1025 supervisory circuits that combine a 2‑kbit serial EEPROM with a power‑monitoring and reset controller. It covers features such as precision voltage monitoring, multiple reset‑threshold options, manual reset input, and write‑protect functionality for the CAT1025.
The document includes pin‑out diagrams, absolute maximum ratings, electrical characteristics, AC timing parameters, reliability data, and detailed ordering information for the various package options (PDIP, SOIC, TSSOP, TDFN, MSOP).
| Write/Erase Endurance | 1,000,000 cycles per byte |
|---|---|
| I²C Bus Frequency | 400 kHz |
The reset output remains active for about 200 ms after power‑up before it is released.
The device supports up to 1,000,000 program/erase cycles per byte.
The I²C (I2C) bus operates at 400 kHz.