The TS80C31X2 is a ROMless version of the 80C31 compatible, high-performance CMOS single chip 8-bit microcontroller 80C51. The TS80C31X2 retains all the features of the TSC80C31 with 128 bytes of internal RAM, a 5-source, 4-priority level interrupt system, an on-chip oscillator and two timer/counters. In addition, the TS80C31X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a X2 speed improvement mechanism. The fully static design of the TS80C31X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The TS80C31X2 has 2 software-selectable operating modes, including idle mode, power-down mode and power-off flag mode.
The TS80C31X2 is a high‑performance CMOS, ROM‑less 8‑bit microcontroller compatible with the 80C51 family. It offers four 8‑bit I/O ports, two 16‑bit timer/counters, 128 bytes of internal RAM, and an X2 speed‑improvement option that reduces the machine‑cycle to six clocks.
This manual describes the device’s features, pin‑out, special‑function register map, power‑mode operation (idle, power‑down, ONCE), and the X2 feature. Package options (PDIL40, PLCC44, VQFP44) and temperature ranges are also listed.
| I/O ports | Four 8‑bit ports |
|---|---|
| Timers | Two 16‑bit timer/counters |
| Internal RAM | 128 bytes scratchpad RAM |
| Maximum frequency (standard mode) | 40 MHz @ 5 V, 30 MHz @ 3 V |
| Power supply range | 4.5‑5.5 V, 2.7‑5.5 V |
| Operating temperature | Commercial 0‑70 °C, Industrial –40‑85 °C |
| Package types | PDIL40, PLCC44, VQFP44 |
The device supports an idle mode where the CPU is frozen while peripherals run, and a power‑down mode where RAM is saved and most functions stop.
In standard mode the TS80C31X2 runs up to 40 MHz at 5 V (30 MHz at 3 V); in X2 mode it can reach 60 MHz at 5 V (40 MHz at 3 V).