The CAT24WC128 is a 128K-bit Serial CMOS E2PROM internally organized as 16384 words of 8 bits each. It features a write protect function, 100,000 program/erase cycles, 100-year data retention, and low power CMOS technology.
This document describes the CAT24WC128 128‑Kbit I²C serial CMOS EEPROM, including its features such as 1 MHz I²C compatibility, low‑power operation from 1.8 V to 6 V, a 64‑byte page write buffer, and various package options. It outlines the pin configuration, absolute maximum ratings, reliability data, and detailed DC and AC electrical characteristics.
The datasheet also explains the I²C bus protocol, device addressing, write and read operation sequences, write‑protect functionality, and ordering information. Revision history and legal notices are included at the end of the document.
| Memory size | 128 K‑bit (16384 × 8 bits) |
|---|---|
| Supply voltage | 1.8 V to 6 V |
| Page write buffer | 64 bytes |
| Write endurance | 100,000 cycles per byte |
| Data retention | 100 years |
| Package options | 8‑Pin DIP, 8‑Pin SOIC, 14‑Pin TSSOP |
| Standby current | 1 µA |
| Operating temperature (commercial) | 0 °C to 70 °C |
The device operates from 1.8 V to 6 V.
It is rated for 100,000 write cycles per byte.
The part is offered in 8‑Pin DIP, 8‑Pin SOIC, and 14‑Pin TSSOP packages.