The CS2200-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2200-OTP is based on an analog PLL architecture comprised of a Delta-Sigma Fractional-N Frequency Synthesizer. This architecture allows for frequency synthesis and clock generation from a stable reference clock. The CS2200-OTP has many configuration options which are set once prior to runtime. At runtime there are three hardware configuration pins available for mode and feature selection.
The CS2200-OTP is a fractional‑N frequency synthesizer clocking device that generates low‑jitter clocks from a reference source. It features one‑time programmability, configurable hardware pins, and a compact 10‑pin MSOP package suitable for commercial‑grade temperature ranges.
This manual covers pin descriptions, typical connection diagrams, electrical characteristics, architecture overview, application notes, parameter settings, programming instructions, package dimensions, ordering information, and revision history, enabling designers to integrate and configure the device in their systems.
| Supply Voltage (VD) typical | 3.3 V (Min 3.1 V, Max 3.5 V) |
|---|---|
| Power Supply Current (unloaded) | 12 mA typical (max 18 mA) |
| Power Dissipation (unloaded) | 40 mW typical (max 60 mW) |
| Period Jitter | ≤ 70 ps rms |
The device operates with a supply voltage (VD) between 3.1 V and 3.5 V, typically 3.3 V.
Three pins (M1, M2, and MO) are provided for mode and feature selection.