This document provides information about the Cirrus Logic CS2100-CP product, including features, specifications, and applications.
The CS2100‑CP is a versatile system‑clocking device that uses a hybrid analog‑digital PLL with a Delta‑Sigma Fractional‑N synthesizer to generate low‑jitter clocks from noisy references as low as 50 Hz. It supports I²C and SPI control interfaces and is offered in a 10‑pin MSOP package for commercial‑grade temperature ranges.
This handbook covers pin descriptions, typical connection diagrams, electrical characteristics, architecture overview, application examples, control‑port programming, register reference tables, package dimensions, ordering information, and revision history, enabling designers to integrate and configure the device in their systems.
| DC Power Supply Voltage (VD) | 3.1 V – 3.5 V (typ 3.3 V) |
|---|---|
| Power Supply Current (unloaded) | 12 mA – 18 mA |
| Power Dissipation (unloaded) | 40 mW – 60 mW |
| PLL Clock Output Frequency | 6 MHz – 75 MHz |
| Ambient Operating Temperature (Commercial grade) | -10 °C – +70 °C |
| Period Jitter | up to 150 ps rms |
The device accepts reference clock frequencies from 50 Hz up to 30 MHz (auto‑R‑Mod disabled) and up to 75 MHz for the REF_CLK input.
The CS2100‑CP is available in a 10‑pin MSOP package for commercial‑grade temperature ranges.
The device operates with a supply voltage (VD) between 3.1 V and 3.5 V, typically 3.3 V.