The ISL5239 Pre-Distortion Linearizer (PDL) is a full featured component for Power Amplifier (PA) linearization to improve PA power efficiency and reduce PA cost.
The ISL5239 is a full‑featured digital pre‑distortion linearizer designed to improve linearity and efficiency of RF power amplifiers. It offers a 125 MSPS output sample rate, 20 MHz signal bandwidth, and dynamic memory‑effects compensation, making it suitable for 3G cellular deployments.
The document provides a block diagram, pinout, pin descriptions, functional description of the input formatter, interpolator, half‑band filters, pre‑distorter, serial interface, and IF converter. It also lists package dimensions, power‑supply requirements, and a register map for configuration.
| Output Sample Rate | Up to 125 MSPS |
|---|---|
| Signal Bandwidth | Full 20 MHz |
| Output Busses | Two 18‑bit with programmable bit‑width |
| Processor Interface | 16‑bit parallel |
| Package | 196‑ball plastic BGA (15 mm × 15 mm) |
| Operating Temperature | -40 °C to 85 °C |
| Core Power Supply (VCCC) | 1.8 V ± 0.18 V |
| I/O Power Supply (VCCIO) | 3.3 V ± 0.165 V |
It is a digital pre‑distortion linearizer that improves linearity and efficiency of RF power amplifiers.
VCCC is 1.8 V ± 0.18 V and VCCIO is 3.3 V ± 0.165 V.
It is offered in a 196‑ball plastic BGA package measuring 15 mm × 15 mm.