This document describes Atmel's ARM926EJ-S™ ARM® Thumb® processor, which features DSP instruction extensions, ARM Jazelle® technology for Java® acceleration, 16KB data cache, 16KB instruction cache, etc. The product also includes additional internal ROM and SRAM, external bus interface, LCD controller, USB interface, etc.
The AT91SAM9261 is a system‑on‑chip built around the ARM926EJ‑S™ ARM® Thumb® processor, delivering 210 MIPS at 190 MHz. It integrates 32 KB of internal ROM, 160 KB of SRAM, 16 KB each of data and instruction cache, and a rich set of peripherals including LCD controller, USB host/device, DMA channels, and multiple serial interfaces.
The device is offered in a 217‑ball LEBGA RoHS‑compliant package and supports a wide range of power supplies (VDDCORE 1.08‑1.32 V, VDDIOP 2.7‑3.6 V, VDDIOM 1.65‑1.95 V/3.0‑3.6 V). The handbook includes a block diagram, detailed signal descriptions, pin‑out tables, memory mapping, and a revision history for engineering reference.
| Processor Core | ARM926EJ‑S™ ARM® Thumb® |
|---|---|
| Performance | 210 MIPS at 190 MHz |
| Internal ROM | 32 KB |
| Internal SRAM | 160 KB |
| Data Cache | 16 KB |
| Instruction Cache | 16 KB |
| Package | 217‑ball LEBGA, RoHS‑compliant |
| Core Power Supply (VDDCORE) | 1.08 V to 1.32 V |
| I/O Power Supply (VDDIOP) | 2.7 V to 3.6 V |
| Memory I/O Power Supply (VDDIOM) | 1.65 V to 1.95 V and 3.0 V to 3.6 V |
| Peripheral DMA Channels | 19 |
| LCD Color Depth | Up to 16 M colors (24‑bit) |
| LCD Resolution | Up to 2048 × 2048 |
It uses the ARM926EJ‑S™ ARM® Thumb® processor.
The device delivers 210 MIPS at a clock speed of 190 MHz.
The AT91SAM9261 provides nineteen Peripheral DMA (PDC) channels.