Industrial

This document describes the features and characteristics of a 74HC/HCT08 quad 2-input AND gate. It is a high-speed Si-gate CMOS device that is pin compatible with low power Schottky TTL (LSTTL). It provides the 2-input AND function.

74HC08 and 74HCT08 are high speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT08 provide the 2-input AND function.

The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function.

The 74HC/HCT107 is a high-speed dual JK flip-flop featuring individual J, K, clock (nCP) and reset (nR) inputs; also complementary Q and Q outputs.

HD74HC01 is a quad 2-input NAND gate with open drain outputs. This product features high speed operation, high output current, wide operating voltage, low input current and low quiescent supply current.

The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function. The 74HC/HCT03 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level.

This document describes the data sheet of Harris Semiconductor's SCHS251D. The product features include buffered inputs, ESD protection exceeding 2kV, SCR-latchup-resistant CMOS process and circuit design, fast addition with reduced power consumption, balanced propagation delays, etc.

Harris Semiconductor SCHS250A is a 9-bit odd/even parity generator/checker that utilizes Advanced CMOS Logic technology. It features balanced propagation delays, high speed, and reduced power consumption. It can be used to check or generate odd/even parity for words up to nine bits long. Even parity is indicated when an even number of data inputs is HIGH, and odd parity is indicated when an odd number of data inputs is HIGH.

This document describes the features and characteristics of the 74HC04 and 74HCT04 high-speed Si-gate CMOS devices. They provide six inverting buffers and comply with JEDEC standards. The products operate in temperature ranges of -40 to +85°C and -40 to +125°C, and have ESD protection.

CD54AC280, CD54ACT280 are 9-bit odd/even parity generator/checkers that utilize Advanced CMOS Logic technology. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even par- ity is indicated (∑E output is HIGH) when an even number of data inputs is HIGH. Odd parity is indicated (∑O output is HIGH) when an odd number of data inputs is HIGH. Parity checking for words larger than nine bits can be accom- plished by tying the ∑E output to any input of an additional 'AC280, 'ACT280 parity checker.

The document describes the features and characteristics of Harris Semiconductor SCHS250, including buffered inputs, propagation delay, ESD protection, CMOS process and circuit design, power consumption, noise immunity, etc.

CD54AC273 / CD74AC273 are high performance CMOS logic D-type flip-flops with reset. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.

The CD74AC253 and CD74ACT253 are dual 4-input multiplexers that utilize Advanced CMOS Logic technology. One of the four sources for each section is selected by the common Select inputs, S0 and S1. When the Output Enable (1OE or 2OE) is HIGH, the output is in the high-impedance state.

This document describes the features and characteristics of the CD74AC251 and CD74ACT251 8-input multiplexers from Harris Semiconductor. These multiplexers utilize Harris Advanced CMOS Logic technology and feature buffered inputs, short propagation delay, ESD protection, and low power consumption.