This document describes the electrical characteristics, switching characteristics, and I/O timing for Stratix III devices. Electrical characteristics include operating conditions and power consumption. Switching characteristics include core performance specifications and periphery performance. A glossary is also included for your reference.
The Altera Nios II Software Developer's Handbook provides an overview of the Nios II embedded development environment, including the Nios II architecture, design, and programming, and how to create application software for Nios II systems.
This document introduces the products and services of ALTERA Corporation and explains its trademarks. It also describes the features and characteristics of the Quartus II TimeQuest Timing Analyzer.
Describes the high-speed source-synchronous differential I/O interfaces in Altera Stratix GX devices, introduces the DPA feature, and compares DPA with CDR
Cyclone V FPGAs are designed to simultaneously meet shrinking power consumption, cost, and time-to-market requirements and increasing bandwidth requirements for high-volume, cost-sensitive applications. Built on TSMC’s 28-nm Low-Power (28LP) process and including an abundance of hard IP, Cyclone V FPGAs deliver up to 40% lower power compared to the previous version.
The document 'Configuring Arria GX Devices' by Altera Corporation provides an introduction to the configuration methods and features of Arria GX II devices.
This is the data sheet for HardCopy II devices from Altera Corporation, which introduces the internal architecture, configuration and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, power consumption reference and ordering information for HardCopy II devices
