The 74ALVC16834A is an 18-bit registered driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP). When LE is LOW, the A to Y data flow is transparent. When LE is HIGH and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop.
The Philips 74ALVC16834A is an 18-bit registered driver designed for high-speed data flow control. It features active low output enable (OE), active low latch enable (LE), and clock inputs (CP). When the latch enable is low, data flows transparently from inputs to outputs. When latch enable is high, data is latched on the rising edge of the clock signal. The device supports a wide supply voltage range of 1.2 V to 3.6 V and offers direct interface with TTL levels.
| Number of bits | 18-bit |
|---|---|
| Supply voltage range | 1.2 V to 3.6 V |
| Output drive capability | +24 mA at 3.0 V |
| Package type | 56-Pin Plastic Thin Shrink Small Outline (TSSOP) |
When LE is LOW, the data flow is transparent. When LE is HIGH, the data is latched on the LOW to HIGH transient of the clock input.
The minimum value is determined by the current-sinking capability of the driver to ensure the high-impedance state during power up or power down.