NXP 74F126 Quad Buffer Datasheet

The 74F126 provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state.


NXP 74F126 Quad Buffer Datasheet - cover page
Brand
NXP
Category
buffer
Document type
Datasheet
Language
English
Pages
13
File format
PDF
File size
130 KB
Published
13 May, 2014
Updated
25 September, 2023
MD5 checksum
6927FB4BF7CC863A0A763C2C26A5B7FF

About this manual

The document describes the NXP 74F126, which provides four non-inverting buffers or line drivers with 3-state outputs. The output enable input (nOE) controls the state of the outputs; a LOW signal at nOE places them in a high-impedance OFF-state.

What's inside

  • General description
  • Features and benefits
  • Ordering information
  • Functional diagram
  • Pinning information
  • Limiting values
  • Recommended operating conditions
  • Static characteristics
  • Dynamic characteristics

Specifications

Number of buffersFour non-inverting buffer/line drivers
Input typeHigh impedance NPN base inputs
Supply voltage (VCC)4.5 V to 5.5 V
Output current (LOW state)64 mA

Frequently asked questions

How are the outputs controlled?

The 3-state outputs (nY) are controlled by the output enable input (NOE). A LOW at nOE causes the outputs to assume a high-impedance OFF-state.

What is the function of the input enable pin?

The symbol 1OEto40E represents the output enable input, which is active HIGH.

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