NXP 74HC40105; 74HCT40105 FIFO Register Datasheet

The 74HC40105; 74HCT40105 is a first-in/first-out (FIFO) "elastic" storage register that can store 16 4-bit words. It can handle input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems. Each word position in the register is clocked by a control flip-flop, which stores a marker bit. A logic 1 signifies that the data at that position is filled and a logic 0 denotes a vacancy in that position. The control flip-flop d


NXP 74HC40105; 74HCT40105 FIFO Register Datasheet - cover page
Brand
NXP
Category
Register
Document type
Datasheet
Language
English
Pages
38
File format
PDF
File size
356 KB
Published
14 May, 2014
Updated
25 September, 2023
MD5 checksum
2986BB0A57214DC8D646764D70A32F56

About this manual

The NXP 74HC40105 and 74HCT40105 are first-in/first-out (FIFO) elastic storage registers capable of storing 16 4-bit words. These devices are designed to handle input and output data at different shifting rates, making them particularly useful as buffers between asynchronous systems. Each word position is clocked by a control flip-flop that stores a marker bit to indicate whether the position is filled or vacant.

What's inside

  • General description
  • Features and benefits
  • Ordering information
  • Functional diagram
  • Pinning information
  • Functional description
  • Inputs and outputs
  • Status flag outputs

Specifications

Storage capacity16 4-bit words
ESD protection HBMexceeds 2 000 V
ESD protection MMexceeds 200 V
Package optionsDIP16, SO16, SSOP16, TSSOP16

Frequently asked questions

What is the primary function of the 74HC40105?

It is a first-in/first-out (FIFO) elastic storage register useful as a buffer between asynchronous systems.

How does the register indicate if the FIFO is full?

The status of the first control flip-flop, known as the data-in ready output (DIR), indicates if the FIFO is full.

What happens when the Master-reset (MR) input is HIGH?

The control functions within the FIFO are cleared, and the data content is declared invalid.

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