This STMicroelectronics application note explains Pierce oscillator theory and provides design guidelines, component selection, and PCB tips for STM8S…
The document introduces the basics of the Pierce oscillator, describes the negative‑resistance oscillator principle, and shows how to calculate key parameters such as drive level and external resistor values. It also gives practical PCB layout recommendations and safety‑factor calculations for reliable oscillator operation.
Sections cover oscillator theory, detailed Pierce‑oscillator design, step‑by‑step crystal and component selection for STM8S/STM8A/STM32, recommended resonators, stability improvement tips, and a FAQ that answers common design questions.
| Negative‑resistance to ESR ratio for HSE oscillators | >5 |
|---|---|
| Negative‑resistance to ESR ratio for LSE oscillators | >3 |
| Load capacitance CL for 8 MHz crystal to achieve exact frequency | 4.02 pF |
The document recommends a ratio higher than 5 for HSE oscillators.
A load capacitance of 4.02 pF should be used.
Section 4 of the note provides detailed guidelines for selecting suitable crystals and external components for STM32 devices.
The note includes PCB layout guidelines, guard‑ring grounding, and separate ground planes to enhance oscillator stability.