This document is an abridged datasheet for the DS28E01-100, a 1-Kb protected 1-Wire EEPROM featuring an on-chip SHA-1 engine for authentication.
The DS28E01-100 is a 1-Kb protected 1-Wire EEPROM that combines 1024 bits of EEPROM memory with challenge-and-response authentication security implemented using the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The device features a 64-bit ROM registration number factory-lasered into the chip and communicates over the single-contact 1-Wire bus at speeds of 15.3kbps or 90.9kbps.
The chip includes an on-chip 512-Bit SHA-1 engine to compute 160-Bit Message Authentication Codes (MACs) and generate secrets. It supports write protection for specific pages and an OTP EPROM emulation mode. The device operates over a voltage range of 2.8V to 5.25V and is available in 2-Lead TO-92, 6-Lead TSOC, and 6-Lead TDFN packages.
| Memory Size | 1024 bits |
|---|---|
| SHA-1 Engine Size | 512-Bit |
| Operating Voltage Range | 2.8V to 5.25V |
| Operating Temperature Range | -40°C to +85°C |
| Data Retention | 40 Years |
| Write/Erase Cycles | 50k |
| Communication Speed | 15.3kbps or 90.9kbps |
It combines challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1).
The device is available in 2-Lead TO-92, 6-Lead TSOC, and 6-Lead TDFN packages.
Yes, all memory pages can be write protected, and one page can be put in OTP EPROM-emulation mode.