The Loongson 3A3000/3B3000 processor user manual details architecture, registers, system configuration, and software programming guidance.
About this manual
This manual provides a comprehensive description of the Loongson 3A3000/3B3000 multicore processor architecture, register set, and system configuration. It is divided into an upper volume covering hardware architecture and a lower volume focusing on software development using the GS464e core.
The document includes detailed tables of registers, configuration guidelines for cache, DDR2/3 SDRAM, HyperTransport, and low‑speed I/O controllers, as well as hardware‑software design notes and PMON configuration procedures. This manual is written in Chinese.
What's inside
- Overview
- System Configuration and Control
- GS464e Processor Core
- Shared Cache (SCache)
- Matrix Processing Accelerator
- Processor Core Inter‑core Interrupt and Communication
- I/O Interrupt
- Temperature Sensor
- DDR2/3 SDRAM Controller Configuration
- HyperTransport Controller
Specifications
| Core voltage (stable operation) | 1.25 V |
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| Processor core frequency | 1400 MHz |
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| Memory frequency | 700 MHz |
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| HyperTransport controller frequency | 800 MHz |
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| HyperTransport bus frequency | 800 MHz / 1600 MHz |
Frequently asked questions
What core voltage and frequencies are recommended for stable operation?
Use a 1.25 V core voltage with the processor core running at 1400 MHz, memory at 700 MHz, the HyperTransport controller at 800 MHz, and the HyperTransport bus at 800 MHz or 1600 MHz.
How is the processor frequency configured?
Frequency is configured entirely by software in PMON; you adjust the settings without modifying the CLKSEL register.
What address should be used for the SPI controller?
When using the SPI controller, change its base address from 0xBFE001F0 to 0xBFE00220.