A Chinese-language guide covering the architecture, instruction set, debugging features and development tools for the ARM Cortex‑M3 processor.
This guide introduces the ARM Cortex‑M3 processor, its 32‑bit ARMv7‑M architecture, Thumb‑2 instruction set and core peripherals. It is aimed at both software developers and hardware designers who need a concise yet thorough reference.
The document explains the debug infrastructure, fault handling mechanisms, system reset procedures and provides example code for common tasks such as triggering a reset or reading fault status registers. Reference material and a list of abbreviations are also included. This manual is written in Chinese.
| APB private peripheral address range | 0xE004_2000 – 0xE00F_F000 |
|---|---|
| Debug Access Port bus type | 32‑bit enhanced APB bus |
| SYSRESETREQ register address | 0xE000ED0C |
Write the value 0x05FA0004 to the SYSRESETREQ bit at address 0xE000ED0C, then store it to trigger the reset sequence.