Technical specification for the ADGS1212, a four-channel SPST switch with an SPI interface featuring error detection and low capacitance.
The ADGS1212 is a four-channel single-pole single-throw (SPST) analog switch controlled by a Serial Peripheral Interface (SPI). It features robust error detection capabilities including CRC, invalid address, and SCLK count errors. The device supports burst mode for reduced command time and daisy-chain configuration to minimize digital wiring when using multiple devices.
Designed with iCMOS technology, the ADGS1212 offers ultra-low charge injection (<1 pC) and capacitance (1 pF typical off-state), making it ideal for data acquisition systems and sampling applications requiring fast settling times. It operates over a wide analog signal range from VSS to VDD and supports both dual supply (±4.5 V to ±16.5 V) and single supply (4.5 V to 16.5 V) configurations.
| Number of Channels | Four independent SPST switches |
|---|---|
| Analog Signal Range | VDD to VSS |
| Typical On-Resistance (Dual Supply) | 120 Ω |
| Typical Charge Injection | < 1 pC |
| Typical Off-State Capacitance | 1 pF |
| Logic Compatibility | 1.8 V (2.7 V ≤ VL ≤ 3.3 V) |
| Supply Voltage Range | ±4.5 V to ±16.5 V (Dual); 4.5 V to 16.5 V (Single) |
| Typical Bandwidth | 1000 MHz |
The device supports CRC, invalid read/write address, and SCLK count error detection.
Yes, they can be connected in a daisy-chain configuration to reduce digital wiring.
The typical off-state drain capacitance is 1 pF at 25°C and ±15 V.