ST 74AUP1G04 handbook

Update: 30 September, 2023

74AUP1G04 is a low voltage CMOS single inverter gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.2 to 3.6 V operations and low power and low noise applications. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2kV ESD immunity and transient excess voltage.

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File format: PDF

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MD5 Checksum: 4BD5EA16558C0C2BE4879CAEB09BE3D5

Publication date: 10 August, 2012

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PDF Link: ST 74AUP1G04 handbook PDF