ST M95M02-DR 2 Mbit serial SPI bus EEPROM handbook

Update: 29 September, 2023

This document describes the features and characteristics of the M95M02-DR product, including compatibility with the Serial Peripheral Interface (SPI) bus, 2 Mb EEPROM memory array, 256-byte page size, additional write lockable page, write protect options, clock frequency, single supply voltage range, write cycle durability, data retention period, and enhanced ESD protection.

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File format: PDF

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MD5 Checksum: 65FDB6A0D5EDE06BB6E00F04295DF57D

Publication date: 09 August, 2012

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PDF Link: ST M95M02-DR 2 Mbit serial SPI bus EEPROM handbook PDF