This data sheet provides detailed information on the 32-bit Power Architecture® based MCU SPC560P44L3, SPC560P44L5 SPC560P50L3, SPC560P50L5 and its features and functions
This document is a production data datasheet for the SPC560P44Lx and SPC560P50Lx series of 32-bit Power Architecture-based microcontrollers. These devices are designed specifically for automotive chassis and safety applications, offering up to 576 KB of on-chip Flash memory with ECC and 40 KB of SRAM.
The datasheet details the device architecture, including a high-performance e200z0h CPU core complex running at 64 MHz. It provides comprehensive information on peripheral interfaces such as FlexCAN (including Safety port), FlexRay, LINFlex, DSPI, and FlexPWM. The document also covers electrical characteristics, thermal data, package mechanicals for LQFP144 and LQFP100 packages, and ordering information.
| CPU Core | 64 MHz, single issue, 32-bit CPU core complex (e200z0h) |
|---|---|
| Flash Memory | Up to 576 KB on-chip code flash memory with ECC |
| SRAM | Up to 40 KB on-chip SRAM with ECC |
| FlexCAN Interfaces | 1 FlexCAN interface (2.0B Active) and 1 Safety port based on FlexCAN |
| FlexRay Module | 1 FlexRay module (V2.1) with selectable dual or single channel support |
| LIN Interfaces | 2 LINFlex channels (LIN 2.1) |
| ADCs | @ Two 10-bit analog-to-digital converters (ADC) |
| Packages | LQFP144 and LQFP100 |
The devices offer up to 576 KB of on-chip code flash memory.
The CPU core complex operates at a maximum frequency of 64 MHz.