This document describes the nomenclature of the AVR instruction set and register operations, including the functions and uses of the status register, destination register, source register, result register, etc.
This document serves as a comprehensive technical reference for the AVR Enhanced RISC microcontroller architecture. It details the complete instruction set, including specific operations for Status Registers (SREG), general-purpose registers, and I/O memory access.
The manual covers various addressing modes used to access Program memory (Flash) and Data memory (SRAM, Register file, I/O Memory). Topics include direct register addressing, indirect addressing with displacement or pre/post-increment, and program memory constant addressing using LPM, ELPM, and SPM instructions.
| Architecture Type | AVR Enhanced RISC microcontroller |
|---|---|
| Document Revision | Rev. 0856I-AVR-07/10 |
| Copyright Year | 2010 |
The X-register is composed of registers R27 and R26.
The LPM, ELPM, and SPM instructions are used for accessing program memory constants.