National Semiconductor MM54C74/MM74C74 Dual D Flip-Flop Datasheet

MM54C74/MM74C74 is a dual D flip-flop. It is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. Each flip-flop has independent data, preset, clear and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse. Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input.


National Semiconductor MM54C74/MM74C74 Dual D Flip-Flop Datasheet - cover page
Brand
National Semiconductor
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
6
File format
PDF
File size
121 KB
Published
07 August, 2012
Updated
30 September, 2023
MD5 checksum
C147267F027CB320AEC6D92FD78EF91F

About this manual

This document is a technical datasheet for the MM54C74 and MM74C74 dual D flip-flops manufactured by National Semiconductor. The devices are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors, featuring independent data, preset, clear, and clock inputs.

What's inside

  • General Description
  • Features
  • Applications
  • Logic Diagram
  • Truth Table
  • Absolute Maximum Ratings
  • DC Electrical Characteristics
  • AC Electrical Characteristics
  • Typical Applications

Specifications

Supply voltage range3V to 15V
Operating Temperature Range (MM74C74)-40°C to +85°C
Maximum Clock Frequency (Vcc=10V)8.0 MHz

Frequently asked questions

What is the logic level transfer condition?

The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse.

How does the preset function work?

Preset is independent of the clock and is accomplished by a low level at the preset input.

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