The MM74C373 and MM74C374 are integrated, complementary MOS (CMOS), 8-bit storage elements with 3-STATE outputs. These outputs have been specially designed to drive high capacitive loads, such as one might find when driving a bus, and to have a fan out of 1 when driving standard TTL. When a high logic level is applied to the OUTPUT DISABLE input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The MM74C373 is an 8-bit latch. When LATCH ENABLE is high, the Q outputs will follow the D inputs. When LATCH ENABLE goes low, data at the D inputs, which meets the set-up and hold time requirements, will be retained at the outputs until LATCH ENABLE returns high again. The MM74C374 is an 8-bit, D-type, positive-edge triggered flip-flop. Data at the D inputs, meeting the set-up and hold time requirements, is transferred to the Q outputs on posi- tive-going transitions of the CLOCK input. Both the MM74C373 and the MM74C374 are being assem- bled in 20-pin dual-in-line packages with 0.300” pin cen- ters. Features I Wide supply voltage range: 3V to 15V I High noise immunity: 0.45 VCC (typ.) I Low power consumption
This document is a datasheet for the MM74C373 and MM74C374, which are integrated complementary MOS (CMOS) 8-bit storage elements with 3-STATE outputs. The MM74C373 is an 8-bit latch, while the MM74C374 is an 8-bit, D-type, positive-edge triggered flip-flop. Both devices are designed to drive high capacitive loads and have a fan-out of 1 when driving standard TTL.
| Supply Voltage Range | 3V to 15V |
|---|---|
| Package Type | 20-pin dual-in-line |
| Storage Elements | Eight storage elements in one package |
| Output Type | 3-STATE outputs |
Yes, they have a fan-out of 1 when driving standard TTL.
The absolute maximum supply voltage is 18V.