Fairchild MM74C73/MM74C76 Dual J-K Flip-Flops Datasheet

The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. They can operate in the 3V to 15V voltage range and drive 2 LPTTL loads. They also have high noise immunity, low power consumption, and medium speed.


Fairchild MM74C73/MM74C76 Dual J-K Flip-Flops Datasheet - cover page
Brand
Fairchild
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
7
File format
PDF
File size
84 KB
Published
07 August, 2012
Updated
30 September, 2023
MD5 checksum
1A5F82DC54A4D1A20E947FA35F997AC0

About this manual

This document provides technical specifications for the MM74C73 and MM74C76 dual J-K flip-flops, which are monolithic complementary MOS (CMOS) integrated circuits. These devices feature independent J, K, clock, clear, and preset inputs, with the MM74C76 specifically including preset functionality in a 16-pin package. The flip-flops are edge-sensitive to the clock input, changing state on the negative going transition.

What's inside

  • General Description
  • Features
  • Applications
  • Ordering Code
  • Truth Tables
  • Logic Diagrams
  • Absolute Maximum Ratings
  • DC Electrical Characteristics
  • AC Electrical Characteristics
  • Physical Dimensions

Specifications

Supply voltage range3V to 15V
Typical power dissipation50 nW
Typical medium speed operation10 MHz
Operating temperature range-40°C to +85°C
Storage temperature range-65°C to +150°C
Maximum toggle frequency (Vcc=5V)4 MHz
Maximum toggle frequency (Vcc=10V)7 MHz

Frequently asked questions

What is the supply voltage range for these flip-flops?

The supply voltage range is 3V to 15V.

How do the MM74C76 flip-flops respond to the clock input?

They are edge sensitive to the clock input and change state on the negative going transition of the clock pulse.

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