The purpose of this application note is to provide STR73x family device users with a number of recommendations on the HW circuitry connected to the main special pins. It covers the pins for power supply (digital and analog), reset, crystal oscillator, the decoupling of the internal voltage regulator, boot modes, test pin, RC oscillator biasing pin and the JTAG debug port. Detailed reference design schematics of the STR730-EVAL board are also contained in this document with descriptions of the main components, interfaces and modes.
The document offers design recommendations for users of the STR73x device family regarding hardware circuits connected to special pins. Key topics include power supply decoupling (VDD/VSS, VPPA/VSSA), internal voltage regulator stabilization (V18), clock management using crystal or RC oscillators, and reset circuitry implementation.
Additionally, the note details boot modes for system memory/user selection, test mode functionality, and JTAG debug port pin configurations. It includes detailed reference design schematics and component values for the STR730-EVAL board to assist with practical implementation.
| Nominal Supply Voltage | 5V |
|---|---|
| Supply Voltage Tolerance | +10% |
| Minimum Reset Pulse Duration | 100us |
| Crystal Oscillator Frequency Range | 4-8 MHz |
| RC Oscillator Modes | 2MHz or 32kHz |
The design requires both a tantalum capacitor and a ceramic capacitor connected between the V18 pin and VSS/GND.
All connections for the crystal oscillator circuit should be kept as short as possible to ensure stability.
A bias resistor of 1.3 MΩ from the VBias pin towards GND is required.