This application note explains the architecture and functionality of the I/O ports in the ST62 series microcontrollers, and provides guidance on how to use these features safely. The ST62 series is suitable for industrial control and other applications.
This document describes the architecture of the I/O ports in the ST62 Series of microcontrollers, detailing the Data Register (DR), Data Direction Register (DDR), and Option Register (OR). It explains how these registers control input/output modes, including push-pull, open drain, interrupt, and analog input capabilities.
The note provides critical guidance on safely switching between these modes to prevent system malfunctions. It specifically addresses the risks associated with using single-bit instructions (SET, RES, RS, IRR) on the Data Register when pins are configured as inputs, offering recommended coding sequences and RAM buffering strategies to avoid unintended state changes.
| Pull-up resistor value | 100K |
|---|---|
| Analog switch resistance | 1/4 kΩ |
All pins switched to analog input mode will be connected together via the analog switches.
They are connected in a logical AND function to the same core interrupt input line.
To prevent accidental changes to the input mode of pins configured as inputs during the read-modify-write cycle.