This application note describes how to generate a digital signal locked in phase and frequency (PLL) with a calibrated delay starting from an active edge on the Auto-reload timer input pin.
This document explains how to generate a digital signal locked in phase and frequency with a calibrated delay using the Auto-reload timer found in the ST62 microcontroller. The timer is an 8-bit timer/counter with a prescaler that supports auto-reload PWM, capture, and compare capabilities.
| Timer type | 8 bit timer/counter with prescaler |
|---|---|
| Input frequency range | 8.7kHz to 28kHz |
| Prescaler ratios | 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096 |
It generates a digital signal locked in phase and frequency with a calibrated delay starting from an active edge on the input pin.
The timer is controlled by the Mode Control Register (MC), Status registers (SCO, SC1), Load register (LR), Incremental counter register (TC), Compare register (CP), and Reload/Capture register (RC).