This is a PCIe interface circuit schematic diagram
The PI6C105 is a high-speed, low-noise clock generator designed to meet all clock needs for Mobile Intel Architecture platforms. It supports split supplies of 3.3 V and 2.5 V to power various outputs including PCI, USB, and Super I/O clocks.
The device features spread spectrum modulation capabilities and includes an asynchronous PWR_DWN# signal for orderly system power down or up. It utilizes a low-cost 14.31818 MHz crystal oscillator input and is available in 28-pin SSOP and SOIC packages.
| CPU Clock Frequencies | 66.6 MHz and 100 MHz |
|---|---|
| PCI Clock Frequency | Synchronous with CPU clock |
| Reference Clock Frequency | 14.31818 MHz |
| USB Clock Frequency | 48 MHz |
| Super I/O Clock Frequency | 24 MHz |
| Package Types | 28-pin SSOP and SOIC |
The device supports CPU and chipset clock frequencies of 66.6 MHz and 100 MHz.
The device uses a low-cost 14.31818 MHz crystal oscillator input.
Yes, it supports Spread Spectrum Modulation for CPUCLK and PCICLK.