32-bit MCU family built on the Power Architecture for automotive body electronics applications
This document describes the SPC560B40x, SPC560B50x, SPC560C40x, and SPC560C50x 32-bit microcontroller family, which is built on Power Architecture technology for automotive body electronics applications. The devices feature a high-performance 64 MHz e200z0h CPU with up to 60 DMIPs operation and variable length encoding.
| CPU Core | 64 MHz e200z0h CPU |
|---|---|
| Max Operation Speed | Up to 60 DMIPs |
| Code Flash Memory | Up to 512 Kbytes |
| Data Flash Memory | 64 Kbytes |
| SRAM Memory | Up to 48 Kbytes |
| Interrupts | 16 priority levels |
| External Interrupts | Up to 34 |
| GPIO Packages | LQFP64/45, LQFP 100/75, LQFP 144/123 |
| Timer Channels | 56 channels |
| ADC Channels | Up to 64 |
| FlexCAN Interfaces | Up to 6 |
| Operating Temperature | -40 to 125 °C |
| Supply Voltage | Single 5 V or 3.3 V |
The operating temperature range is up to -40 to 125 °C.
The devices support a single 5 V or 3.3 V supply.
It uses a high-performance 64 MHz e200z0h CPU.