Analog Devices ADSP-21991 Mixed Signal DSP Controller Datasheet

ADSP-21991 is a mixed signal DSP controller released by Analog Devices. It has a 16-bit fixed-point DSP core with a maximum operating frequency of 160 MHz, and 40K words of RAM, which can be configured as 32K words of 24-bit program RAM and 8K words of 16-bit data RAM. It also has an external memory interface, a dedicated memory DMA controller, a programmable PLL, and a flexible clock generation circuit, which supports full-speed operation from low-speed input clocks. It also has an IEEE JTAG standard 1149.1 test access port, which supports on-chip emulation and system debugging.


Analog Devices ADSP-21991 Mixed Signal DSP Controller Datasheet - cover page
Brand
Analog Devices
Category
microcontrollers
Document type
Datasheet
Language
English
Pages
44
File format
PDF
File size
589 KB
Published
03 August, 2012
Updated
30 September, 2023
MD5 checksum
CE2AC97786CC5A8AC5B688808A2E7A79

About this manual

The ADSP-21991 is a mixed signal DSP controller based on the ADSP-219x DSP Core, designed for high-performance industrial motor control and signal processing applications. It integrates a 16-bit fixed-point DSP core with up to 160 MIPS sustained performance and 40K words of on-chip RAM configured as 32K words of program RAM and 8K words of data RAM.

The device includes a comprehensive set of embedded control peripherals, including an 8-channel 14-bit Analog-to-Digital Converter (ADC), a PWM generation unit, an Encoder Interface Unit, and various communication ports like SPI and SPORT. Fabricated in a high-speed, low-power CMOS process, it operates with a 6.25 ns instruction cycle time at a 160 MHz core clock rate.

What's inside

  • General Description
  • DSP Core Architecture
  • Memory Architecture
  • External Memory Space
  • DMA Controller
  • Serial Peripheral Interface (SPI) Port
  • Analog-to-Digital Conversion System
  • PWM Generation Unit
  • Interrupts
  • Low Power Operation

Specifications

DSP Core16-Bit, Fixed Point
Sustained Performanceup to 160 MIPS
On-Chip RAM40K Words
Program RAM32K Words (24-Bit)
Data RAM8K Words (16-Bit)
ADC Channels8-Channel
ADC Sampling Rateup to 20 MSPS
Core Clock Rate160 MHz
Instruction Cycle Time6.25 ns
Operating Temperature-40ºC to +85ºC
Package196-Ball Mini-BGA or 176-Lead LQFP

Frequently asked questions

What is the maximum sustained performance of the ADSP-21991?

The device provides up to 160 MIPS sustained performance.

What is the operating temperature range for the ADSP-21991?

The device operates within a temperature range of –40ºC to +85ºC.

What is the instruction cycle time for a 160 MHz core clock?

The instruction cycle time is 6.25 ns for a 160 MHz CCLK.

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