This document discusses power consumption of ADSP-214xx SHARC® processors based on characterization data measured over power supply voltage, core frequency (CCLK), and junction temperature (TJ).
This Engineer-to-Engineer Note discusses power consumption of ADSP-214xx SHARC processors based on characterization data measured over power supply voltage, core frequency, and junction temperature. The document is intended to assist board designers in estimating their power budget for power supply and thermal relief designs.
The note details how to derive internal power consumption components (static and dynamic) and external power consumption based on dynamic activity levels, I/O activity, and environmental conditions. It includes definitions for discrete dynamic activity levels ranging from idle to peak activity for ADSP-2146x, ADSP-2147x, and ADSP-2148x processors.
| Core clock frequency (Commercial) | up to 450 MHz |
|---|---|
| Core clock frequency (Automotive/Industrial) | up to 400 MHz |
| Core operating voltage (Commercial) | 1.1V |
| Core operating voltage (Automotive/Industrial) | 1.05V |
| DDR2 voltage | 1.8 V |
| I/O voltage | 3.3 V |
The intent is to assist board designers in estimating their power budget for power supply and thermal relief designs using ADSP-214xx processors.
Total power consumption has two components: one due to internal circuitry (core and PLL) and the other due to the switching of external output drivers.