This application note introduces the bus hold function, which is a new technology for solving floating input problems. The bus hold circuit is able to hold the valid logic of open inputs, and so no external resistors are required to prevent floating or open inputs. The bus hold circuit can mitigate the constraints of floating input conditions. When using non-bus hold devices, these floating input conditions may cause current leakage, oscillation, and data errors. Another feature of the bus hold circuit is the ability to maintain the valid logic state of a 3-state data bus. Therefore, through this data bus, bus hold devices can control the inputs of other devices on the bus.
This document describes a new circuit technique called the bus-hold circuit designed to solve problems associated with floating inputs. Unlike non-bus-hold devices where floating inputs can cause data errors or oscillation due to leakage currents, bus-hold circuits maintain a valid logical state on open or floating inputs without requiring external resistors.
The note details how these circuits work by using low-drive capability inverters at the input stage to hold the last received signal. It provides specific electrical specifications for Fairchild's CROSSVOLT series devices (such as 74LVTHxxx and 74VCXHxxx) that feature this technology, including drive current requirements and voltage conditions. This manual is written in Japanese.
It solves problems related to floating inputs by maintaining a valid logical state, eliminating the need for external resistors.
They allow the design of data paths without needing external resistors, saving space and reducing trace lines.