The MPC9992 is a 3.3V compatible, PLL based PECL clock driver. Using SiGe technology and a fully differential design ensures optimum skew and PLL jitter performance. The performance of the MPC9992 makes the device ideal for workstation, mainframe computer and telecommunication applications. With output frequencies up to 400 MHz and output skews less than 150 ps1 the device meets the needs of the most demanding clock applications. The MPC9992 offers a differential PECL input and a crystal oscillator interface. All control signals are LVCMOS compatible.
The MPC9992 is a 3.3 V compatible, PLL‑based differential PECL clock driver designed for high‑speed workstation, mainframe and telecommunication applications. It offers up to 400 MHz output frequency, selectable crystal or PECL input, and seven differential outputs, all controlled by LVCMOS‑compatible signals.
The device is supplied in a 32‑lead LQFP package, operates from a single 3.3 V supply, and supports an ambient temperature range of 0 °C to +70 °C. Detailed electrical specifications, pin configurations, and PLL programming options are provided for designers.
| Supply Voltage (Voc) | -0.3 V to 3.6 V |
|---|---|
| Maximum Output Frequency | 400 MHz |
| Number of Differential Outputs | 7 |
| Operating Temperature Range | 0 °C to +70 °C |
| DC Input Current (lin) | 20 mA |
The device supports output frequencies up to 400 MHz.
It provides seven differential outputs.
The absolute maximum supply voltage is –0.3 V to 3.6 V, with normal operation at 3.3 V.