Xicor X25650 Serial EEPROM Datasheet

The document introduces the features and characteristics of Xicor X25650 5MHz SPI Serial E2PROM 64K 8K x 8 Bit.


Xicor X25650 Serial EEPROM Datasheet - cover page
Brand
ICmic
Category
Memory
Document type
Datasheet
Language
English
Pages
14
File format
PDF
File size
134 KB
Published
10 May, 2012
Updated
30 September, 2023
MD5 checksum
1B0E8EE6DE36BC964783A9AE723D2D03

About this manual

The X25650 serial EEPROM provides 64 Kbits (8K × 8) of non‑volatile memory organized for SPI operation up to 5 MHz. It features low standby current (<1 µA), low active current (<5 mA), block‑lock protection for 1/4, 1/2 or full array, and optional hardware write‑protect via the WP pin and WPEN bit. The device operates from 2.5 V to 5.5 V and includes ESD protection of 2000 V on all pins.

Pin functions include CS, SI, SO, SCK, WP, HOLD and VCC. The device supports standard SPI modes (0,0 and 1,1) and allows page writes of up to 32 bytes. Detailed timing diagrams, status register bits, and write‑enable sequences are provided, along with absolute maximum ratings and recommended operating conditions for commercial and industrial temperature ranges.

What's inside

  • Features
  • Pin Descriptions
  • Principles of Operation
  • Status Register
  • Write Protect
  • Hold Operation
  • Operational Notes
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Packaging Information

Specifications

Memory Size64 Kbits (8K × 8)
Clock Rate5 MHz
Standby Current<1 µA
Active Current<5 mA
Write Cycle Time5 ms (typical)
Endurance100 000 cycles
Data Retention100 years
ESD Protection2000 V on all pins
Operating Temperature (Commercial)0 °C to +70 °C
Operating Temperature (Industrial)-40 °C to +85 °C

Frequently asked questions

What is the maximum clock frequency for the X25650?

The device operates up to a 5 MHz SPI clock rate.

How many bytes can be written in a single page write operation?

Up to 32 bytes can be written in a single page write, provided they reside on the same page.

Which pins control hardware write protection?

The WP (Write Protect) pin together with the WPEN bit in the status register control hardware write protection.

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