Analog Devices AD9461 16‑Bit 130 MSPS IF Sampling ADC Datasheet

AD9461 is a high-performance 16-bit, 130 MSPS IF sampling ADC with excellent performance and scalability to meet the needs of various wireless communication applications. It integrates a 16-bit Σ-Δ converter, a low-noise preamplifier with enhanced dynamic range, and a scalable digital output.


Analog Devices AD9461 16‑Bit 130 MSPS IF Sampling ADC Datasheet - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
28
File format
PDF
File size
814 KB
Published
09 May, 2012
Updated
01 October, 2023
Model
AD9461
MD5 checksum
AE69C0F5DCAD7ACDEEC799B066383EAA

About this manual

The AD9461 from Analog Devices is a monolithic 16‑bit analog‑to‑digital converter optimized for high‑speed intermediate‑frequency (IF) sampling up to 130 MSPS. It features on‑chip track‑and‑hold, selectable LVDS or CMOS outputs, and a built‑in reference, making it suitable for MRI, radar, broadband wireless and other high‑performance instrumentation.

The device operates from 3.3 V (AVDD1) and 5.0 V (AVDD2) supplies, offers a differential input range of 3.4 V p‑p, and provides low jitter (60 fsec rms) and excellent linearity (DNL ±0.6 LSB, INL ±5 LSB). It is supplied in a Pb‑free 100‑lead TQFP_EP package rated for –40 °C to +85 °C.

What's inside

  • Features
  • Functional Block Diagram
  • Applications
  • General Description
  • Product Highlights
  • Revision History
  • Specifications
  • DC Specifications
  • AC Specifications
  • Digital Specifications

Specifications

Resolution16 Bits
Maximum Sampling Rate130 MSPS
Power Consumption (LVDS)2.2 W
Supply Voltage AVDD13.3 V (±5%)
Supply Voltage AVDD25.0 V (±5%)
Input Span3.4 V p‑p differential
Signal‑to‑Noise Ratio (10 MHz input)78.7 dBFS
Effective Number of Bits (10 MHz input)12.5 Bits
Aperture Jitter60 fsec rms
Package100‑lead TQFP_EP

Frequently asked questions

What is the maximum sampling rate of the AD9461?

The AD9461 can sample at up to 130 MSPS.

What supply voltages does the AD9461 require?

It requires AVDD1 = 3.3 V, AVDD2 = 5.0 V, and DRVDD = 3.3 V for full performance.

What is the differential input voltage range of the AD9461?

The device accepts a 3.4 V p‑p differential input voltage.

What is the jitter performance of the AD9461?

The aperture uncertainty (jitter) is specified as 60 fsec rms.

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