The ABI JTAGMaster is a fully integrated and powerful solution for the in-system programming of Programmable Logic Devices (PLDs) and memory devices. Standalone programming is also supported by the JTAGMaster for serial EEPROMs. With direct applications in Electronics Production (End-of-Line) and Research & Development, the JTAGMaster is the only tool required to cover all your programming needs.
The JTAGMaster is a fully integrated programmer for in‑system programming of programmable logic devices (PLDs) and out‑of‑circuit programming of serial EEPROMs using SPI, I²C and Microwire protocols. It provides two standard ISP headers compatible with Altera and Xilinx devices and a configurable cable for a wide range of other components. The accompanying ABI Interface Manager software (AIMs) offers customizable windows, TestFlow automation, and detailed status reporting.
An optional Boundary Scan Tester add‑on enables diagnosis and debugging of complex PCB assemblies by monitoring individual pins via the JTAG protocol. The manual also lists electrical, environmental, and physical specifications, as well as required computer resources for operation.
| Operating voltage | 5 V (powered by USB port) |
|---|---|
| Power consumption | 500 mW |
| Dimensions | 83 × 52 × 16 mm |
| Weight | 200 g |
| USB interface | USB 2.0 compatible |
| JTAG baud rate | up to 6 Mbits/sec |
| Operating temperature | 0 °C to 50 °C |
| Storage temperature | 0 °C to 70 °C |
| Humidity | up to 80 % non‑condensing |
| Minimum RAM | 512 MB |
| Hard disk space | 50 MB |
The JTAGMaster supports SPI, I²C and Microwire for serial EEPROMs and uses the JTAG protocol for in‑system programming of PLDs.
Two standard ISP headers based on Altera and Xilinx models are provided, plus a configurable cable for additional devices.
Yes, the JTAGMaster Boundary Scan Tester can be added to diagnose and debug PCB assemblies using the JTAG test protocol.