The G2995 is a linear regulator designed to meet the JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM.
The G2995 is a linear bus‑termination regulator designed to meet JEDEC SSTL‑2 and SSTL‑3 specifications for DDR‑SDRAM. It operates from a supply voltage of 1.6 V to 5.5 V, draws a low quiescent current of 280 µA at 2.5 V, and can deliver up to 1.5 A continuous (3 A peak) output current without external inductors or resistors.
Typical applications include DDR‑SDRAM termination on motherboards and DIMMs, where the device provides a VDDQ/2 reference voltage and supports both sinking and sourcing of termination currents. The regulator is offered in an SOP‑8L package with a Power‑Pad for improved thermal performance, and recommended external capacitors improve stability during load transients.
| Supply Voltage Range | 1.6 V to 5.5 V |
|---|---|
| Quiescent Current | 280 µA @ 2.5 V |
| Continuous Output Current | 1.5 A |
| Thermal Shutdown Temperature | 150 °C |
| Package Type | SOP‑8L with Power‑Pad |
The G2995 can deliver up to 1.5 A continuous output current.
The quiescent current is 280 µA when operating at 2.5 V.
It is supplied in an SOP‑8L package with a Power‑Pad (and an FD variant).
An output capacitor of at least 220 µF with low ESR is recommended for SSTL applications.