This file introduces the features of EZ-USB FX2LP™ USB microcontroller, including USB 2.0, single-chip integrated USB 2.0 transceiver, smart SIE and enhanced 8051 microprocessor, ultra low power, 8051 code runs etc.
The EZ‑USB FX2LP™ family integrates a USB 2.0 transceiver, smart SIE, enhanced 8051 core, and programmable peripheral interfaces in a single chip. It offers low‑power operation, multiple clock options (12 MHz, 24 MHz, 48 MHz), and a range of lead‑free packages with up to 40 GPIOs. The device supports bus‑powered and battery‑powered applications, with suspend currents as low as 100 µA.
The manual covers functional blocks, USB signaling speeds, register maps, interrupt handling, reset and wake‑up procedures, and memory architecture. It also details package dimensions, solder‑mask guidelines, and reference design resources for implementing the FX2LP in video recorders, DSL modems, memory card readers, and other USB 2.0 applications.
| USB Signaling Speed | Full speed 12 Mbps, High speed 480 Mbps (low‑speed not supported) |
|---|---|
| Suspend Current (typical) | 100 µA for CY7C68014A and CY7C68016A; 300 µA for CY7C68013A and CY7C68015A |
| Internal RAM | 16 KBytes of combined program/data RAM |
| CPU Clock Options | 12 MHz, 24 MHz, or 48 MHz (four clocks per instruction cycle) |
The FX2LP supports Full speed at 12 Mbps and High speed at 480 Mbps; it does not support the low‑speed 1.5 Mbps mode.
The device provides 16 KBytes of internal program and data RAM.