Teridian 73M1822 Keychain Demo Board User Manual

Simplifying System IntegrationTM 73M1822 Keychain Demo Board User Manual


Teridian 73M1822 Keychain Demo Board User Manual - cover page
Brand
Teridian
Category
Other Electronics
Document type
User Manual
Language
English
Pages
31
File format
PDF
File size
448 KB
Published
11 April, 2012
Updated
30 September, 2023
MD5 checksum
FD7407522CDA6A626FC15E17CD5B789A

About this manual

The 73M1822 Keychain Demo Board integrates a single‑chip silicon Data Access Arrangement (DAA) with analog front‑end functions in a compact 42‑pin QFN package. It provides modem codec capabilities, caller ID, ring detection, and other DAA features for evaluation with a host DSP or CPU.

The manual describes the board’s hardware layout, connector pinouts (JP2 host interface and JP1 line interface), safety and ESD precautions, and the software initialization sequence required to operate the device. It also includes schematics, bill of materials, and contact information for further support.

What's inside

  • Introduction
  • Safety and ESD Notes
  • Demo Board Options
  • Connectors
  • Software Description
  • Register Polling
  • Pinout
  • Bill of Materials
  • Related Documentation
  • Contact Information

Specifications

Package42‑pin QFN
Supported Data Rateup to V.92
Power Supply3.3 V
DAA FunctionIntegrated silicon DAA
Connector TypesJP2 host interface, JP1 line interface

Frequently asked questions

What is included in the 73M1822 Keychain Demo Board kit?

The kit includes the 73M1822 Keychain Demo Board (Rev. D1) and a CD with the user manual, data sheet, schematic/layout guidelines, and worldwide design guide.

What voltage supplies the demo board?

The board is powered by a 3.3 V supply provided on pin 3 of the JP2 connector.

Which connectors are used for host and telephone line connections?

JP2 is the host interface connector, while JP1 provides the telephone line (TIP and RING) connections.

How are the LIC and HIC registers synchronized?

The host can poll the LIC register via the HIC register using a register polling mechanism to re‑synchronize the two sides.

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