S3C2800 32-BIT RISC MICROPROCESSOR DATA SHEET is a detailed description of a 32-bit RISC microprocessor released by Samsung
The S3C2800 is a 32‑bit RISC microprocessor built on an ARM920T core, targeting cost‑sensitive and power‑sensitive applications. It integrates on‑chip peripherals such as 16 KB I/D caches, 2‑channel UART, 4‑channel DMA, 3‑channel timers, a 16‑bit watchdog, 44 GPIO ports, I²C, RTC, and a 32‑bit PCI bus.
The device is supplied in a 208‑pin LQFP package, operates from a 1.8 V core supply (3.3 V I/O), and supports up to 200 MHz clock speeds. Detailed electrical characteristics, pin assignments, and mechanical dimensions are provided in the datasheet.
| Core | ARM920T (220 MIPS @200 MHz) |
|---|---|
| Core Voltage | 1.8 V (±0.1 V / +0.15 V) |
| I/O Voltage | 3.3 V |
| Maximum Clock Frequency | 200 MHz |
| Cache Size | 16 KB I‑cache + 16 KB D‑cache |
| UART Channels | 2‑channel with handshake and FIFO |
| DMA Channels | 4‑channel general‑purpose DMA |
| Timers | 3 × 16‑bit timers |
| Watchdog Timer | 16‑bit |
| GPIO Ports | 44 multiplexed I/O ports (8 external interrupt ports) |
| PCI Bus Interface | 32‑bit, up to 66 MHz |
| Package | 208‑pin LQFP |
The microcontroller can run up to 200 MHz.
It includes a 2‑channel UART with handshake and FIFO support.
The device is supplied in a 208‑pin LQFP package.
The core operates at 1.8 V (with a tolerance of –0.1 V / +0.15 V).