This document introduces the application of Xilinx's 7 series, Virtex-6, and Spartan-6 FPGAs in portable ultrasound systems. By utilizing these FPGAs to solve complex problems, it is possible to rapidly provide cutting-edge ultrasound technology within appropriate cost and power constraints.
This document describes the architecture and design considerations for a portable ultrasound system that leverages Xilinx FPGA families (7‑series, Virtex‑6, Spartan‑6). It covers system block diagrams, front‑end AFE, beam‑forming modules, and back‑end processing, highlighting how FPGA resources enable low‑cost, high‑performance implementations.
Key topics include power‑consumption strategies, interface requirements (LVDS, JESD204, SPI, high‑speed SerDes), and the trade‑offs between ASIC, DSP and FPGA solutions for ultrasound beam‑forming and signal processing. This manual is written in Chinese.
| FPGA families | 7‑series, Virtex‑6, Spartan‑6 |
|---|---|
| ADC sampling rate | 30 MSPS (typical 12‑bit) |
The design can be implemented with 7‑series, Virtex‑6 or Spartan‑6 FPGAs.