Industrial

The D64 and DP64 Series of small 4-pole fixed-frequency, precision active filters provide high performance linear active filtering in a compact 32-pin DIP package, with a broad range of corner frequencies and a choice of transfer functions. Individual D64 filters can serve in low-pass or high-pass applications (DP64, low-pass only) or be combined to create custom band-pass or band-reject filters. These fully self-contained units require no external components or adjustments. Each model comes factory tuned to a user-specified corner frequency between 1 Hz and 100 kHz (DP64, 1 Hz to 5 kHz) and operate with low total harmonic distortion over a wide dynamic input voltage range

This document is the datasheet of COMCHIP CZRL55C2V4 Thru C75. It mainly introduces the product's characteristics, specifications, parameters, etc.

The CYW15G0201DXB CYV15G0201DXB CYP15G0201DXB is a second-generation HOTLink II™ transceiver produced by Cypress Semiconductor Corporation. It is compatible with multiple standards, including ESCON, DVB-ASI, Fibre Channel and Gigabit Ethernet (IEEE802.3z), CPRI™, CYW15G0201DXB conforms to OBSAI-RP3, CYV15G0201DXB conforms to SMPTE 259M and SMPTE 292M. The data uses 8B/10B encoding or 10-bit unencoded data. The dual channel transceiver operates from 195 to 1500 MBaud serial data rate, the CYW15G0201DXB operates from 195 to 1540 MBaud serial data rate, and the total throughput is 6 GBits/second.

This document describes the features and characteristics of the 32K/64K x16/18 Synchronous Dual Port Static RAM produced by Cypress Semiconductor Corporation, including True dual-ported memory cells, Flow-Through/Pipelined devices, three operating modes, high-speed clock access, low power consumption, fully synchronous interface, etc.

This document introduces the features of the Cypress Delta39K ISR CPLD Family products, including high density, high speed, multiple voltage interfaces, low power consumption, and simple timing model.

CY26049-22 is a FailSafe™ frequency synthesizer with a reference clock input, 100MHz output, low jitter, high accuracy output, support 3.3V ± 5% power supply, and a 16-lead TSSOP package.

The CXD3220R is a Link/Transaction Layer LSI conforming to the IEEE1394 serial bus standard. It is mainly used when connecting the IEEE1394 digital I/F to a storage device such as a hard disk, DVD-ROM, CD-ROM or tape streamer. Data transfer conforms to the SBP-2 protocol. This LSI utilizes Apple Computer's Fire Wire technology.

Aeroflex CT2553 is a MIL-STD-1553 Bus Controller (BC), Remote Terminal Unit (RTU) and Bus Monitor (MT) device. It features dual low-power transceivers, complete BC/RTU/MT protocol logic, MIL-STD-1553 to host interface unit and 8K x 16 RAM.

This product is an 8 terminal flat film resistor array, with a wide range of resistance, low power consumption and high reliability.

The CENTRAL SEMICONDUCTOR CMPZ4678 Series Silicon Zener Diode is a high quality voltage regulator designed for applications requiring an external resistor for current limiting. The device is manufactured using high quality silicon material and offers high stability, low noise and fast response time.

This datasheet provides a detailed overview of the CL-CS3712, Cirrus Logic's high integration, high performance ATAPI DVD drive manager. It integrates all required components for a DVD loader for DVD players, game consoles, and DVD-ROM drives. The CL-CS3712 includes an RF amp, servo control processor, data channel, DVD ECC, CSS authorization, CD-ROM decoder, and ATAPI interface. The CL-CS3712 can be configured with an audio DAC (digital-to-analog converter), external buffer memory (8- or 16-bit DRAM), a local micro-controller with its RAM and ROM, and power drivers to create a complete DVD-ROM electronics solution. The CL-CS3712 supports DVD disc speeds up to 8x and Ultra DMA host speeds

The CDCF2510 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver from Texas Instruments. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The CDCF2510 operates at 3.3V VCC. It also provides integrated series-damping resistors that make it ideal for driving point-to-point loads. One bank of ten outputs provide ten low-skew, low-jitter copies of CLK. Output signal duty cycles are adjusted to 50%, independent of the duty cycle at CLK. The outputs can be enabled/disabled with the control (G) input. When the G input is high, the outputs switch in phase.