STMicroelectronics Manuals

This document describes the features and characteristics of the TS556 low-power dual CMOS timer, revised in October 2008. It includes very low power consumption, high maximum astable frequency, wide voltage range, reduced supply current spikes during output transitions, high input impedance, and pin-to-pin and functionally compatibility with the bipolar NE556.

TS555 is a single chip CMOS timer with ultra low power consumption, high frequency, wide voltage range, TTL, CMOS and logic MOS compatible output.

M48T35 and M48T35Y are products that integrate ultra-low-power SRAM, real-time clock, power-fail control circuit, and battery. They have BYTEWIDE RAM-like clock access, BCD-coded year, month, day, date, hours, minutes, and seconds, frequency test output for the real-time clock, automatic power-fail chip deselect, and WRITE protection.

The document describes the features and characteristics of the M48T58 and M48T58Y products, including integrated ultra low-power SRAM, real-time clock, power-fail control circuit, and battery. It also includes BCD coded year, month, day, date, hours, minutes, and seconds, frequency test output for real-time clock, automatic power-fail chip deselect and WRITE protection, WRITE protect voltages, self-contained battery and crystal in the CAPHAT™ DIP package, packaging options, and pin and function compatibility with JEDEC standard 8 Kb x 8 SRAMs.

M48T08 is a 5V, 64 Kbit (8 Kb x 8) TIMEKEEPER® SRAM that integrates ultra-low power SRAM, real-time clock, power-fail control circuit, and battery. It features BYTEWIDE™ RAM-like clock access, BCD coded year, month, day, date, hours, minutes, and seconds, typical clock accuracy of ±1 minute a month at 25°C, automatic power-fail chip deselect and WRITE protection, software controlled clock calibration for high accuracy applications, and a self-contained battery and crystal in the CAPHAT™ DIP package.

M48T02 M48T12 5.0 V, 16 Kbit (2 Kb x 8) TIMEKEEPER® SRAM is a low power real-time clock chip from ST company. It features BCD coded year, month, day, date, hours, minutes and seconds. The typical clock accuracy is ±1 minute/month at 25°C and supports software controlled clock calibration and automatic power-fail chip deselect and write protection.

The NE556, SA556 and SE556 are dual monolithic timing circuits with high stability controllers capable of producing accurate time delays or oscillation.

The NE555, SA555, and SE555 monolithic timing circuits are highly stable controllers capable of producing accurate time delays or oscillation.

This document provides information on a product that is still in production but not recommended for new designs. The product is a 256 Kbit serial I²C bus EEPROM with two chip enable lines, designated as M24256-A. It is compatible with I2C extended addressing, supports 400 kHz protocol, and has features such as single supply voltage, hardware write control, and more.

M24256-A 256 Kbit Serial I C Bus EEPROM is a Microchip product that is compatible with I2C extended addressing and supports the 400 kHz protocol.

The M24164 is a 16 Kbit (2048 x 8) electrically erasable programmable memory (EEPROM) accessed by an I2C-compatible bus. It supports a two-wire I2C serial interface with a 400 kHz protocol. The device operates on a single supply voltage of 4.5V to 5.5V for M24164 or 2.5V to 5.5V for M24164-W. It features write control input, byte and page write (up to 16 bytes), random and sequential read modes, self-timed programming cycle, automatic address incrementing, enhanced ESD/latch-up behavior, more than 1 million erase/write cycles, and more than 40 years of data retention.

The M24164 is a 16Kbit (2048 x 8) electrically erasable programmable memory (EEPROM) accessed by an I2C-compatible bus.

This document introduces the features of 256Kbit and 128Kbit Serial I²C Bus EEPROM With Three Chip Enable Lines, including compatible with I2C Extended Addressing, Two Wire I2C Serial Interface Supports 400 kHz Protocol, Single Supply Voltage, Hardware Write Control, BYTE and PAGE WRITE, RANDOM and SEQUENTIAL READ Modes, Self-Timed Programming Cycle, Automatic Address Incrementing, Enhanced ESD/Latch-Up Behavior, More than 100,000 Erase/Write Cycles, More than 40 Year Data Retention

M24256-B and M24128-B are two 256/128Kbit I2C bus EEPROMs with three chip enable lines, compatible with I2C extended addressing, support 400kHz protocol, single supply voltage 4.5V to 5.5V, can perform byte and page write (up to 64 bytes), support random and sequential read modes, self-timed programming cycle, automatic address incrementing, enhanced ESD/Latch-Up behavior, 100000 erase/write cycles (minimum), 40 years of data retention (minimum).

The TDA7498 is a dual BTL class-D audio amplifier with single power supply designed for home systems and active speaker applications. It features 100-W + 100-W output power, wide-range single-supply operation, high efficiency, four selectable fixed gain settings, differential inputs to minimize common-mode noise, standby and mute features, short-circuit protection, and thermal overload protection.