The AD679 is a 14-bit 128 kSPS ADC that integrates a high-speed sample-and-hold amplifier (SHA), ADC, 5 V reference, clock, and digital interface on a single chip. It provides a fully specified sampling A/D function that is unattainable with discrete designs. It features a conversion rate of 128k conversions per second, a full power bandwidth of 1 MHz, a full linear bandwidth of 500 kHz, and a 78 dB S/N+D ratio. The AD679 uses twos complement data format (bipolar mode) and straight binary data format (unipolar mode), has a 10MΩ input impedance, supports 8-bit bus interface, on-board reference and clock, an input range of 10V unipolar or bipolar, and is pin compatible with the AD678 12-bit 200 kSPS ADC. It also offers versions that comply with MIL-STD-883.