The LPC2101/2102/2103 are based on an ARM7TDMI-S CPU supporting real-time emulation, and include 8kB and 32kB of embedded high-speed Flash memory. A 128-bit wide memory interface and a unique acceleration structure enable 32-bit code to run at maximum clock rate. This can improve the performance of critical functions in interrupt service routines and DSP algorithms by 30% over Thumb mode. Applications with strict code size constraints can use the 16-bit Thumb mode to reduce code size by over 30% with negligible performance loss. The LPC2101/2102/2103 are very small and have extremely low power consumption, making them ideal for applications where small size is a primary requirement. A combination of multiple UARTs, SPI to SSP and 2 I2C busses together with 2kB/4kB/8kB of on-chip SRAM make the LPC2101/2102/2103 an ideal MCU.
This manual provides an overview of the Philips LPC2101, LPC2102 and LPC2103 microcontrollers, describing their architecture, core features, and typical applications. It includes sections on specifications, functional blocks, and package information.
Detailed chapters cover the pin configuration, peripheral functions such as ADC, UART, SPI, timers, PWM, and power management, as well as programming resources like on‑chip flash and boot‑loader support. The document also lists abbreviations and reference tables for quick lookup. This manual is written in Chinese.
| CPU core | ARM7TDMI‑S |
|---|---|
| Maximum operating frequency | 70 MHz |
| Flash memory | 8 kB / 16 kB / 32 kB (per model) |
| SRAM | 2 kB / 4 kB / 8 kB (per model) |
| ADC resolution | 10‑bit |
The microcontrollers use an ARM7TDMI‑S core.
They can operate up to 70 MHz.
LPC2101 has 8 kB, LPC2102 has 16 kB, and LPC2103 has 32 kB of flash memory.