Update: 30 September, 2023
The LPC2101/2102/2103 are based on an ARM7TDMI-S CPU supporting real-time emulation, and include 8kB and 32kB of embedded high-speed Flash memory. A 128-bit wide memory interface and a unique acceleration structure enable 32-bit code to run at maximum clock rate. This can improve the performance of critical functions in interrupt service routines and DSP algorithms by 30% over Thumb mode. Applications with strict code size constraints can use the 16-bit Thumb mode to reduce code size by over 30% with negligible performance loss. The LPC2101/2102/2103 are very small and have extremely low power consumption, making them ideal for applications where small size is a primary requirement. A combination of multiple UARTs, SPI to SSP and 2 I2C busses together with 2kB/4kB/8kB of on-chip SRAM make the LPC2101/2102/2103 an ideal MCU.
Brand: ZLG manuals
File format: PDF
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MD5 Checksum: 5DF66AACA1C099F562E0B2BFF61F4CC4
Publication date: 09 October, 2011
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