This document describes the features and characteristics of the 74AUP1G125 low power single tristate buffer, such as high speed, low power dissipation, operating voltage range, etc.
The 74AUP1G125 is a low voltage CMOS single tristate buffer fabricated with sub-micron silicon gate and double-layer metal wiring CMOS technology. It is designed for 1.2 to 3.6 V operations and is ideal for low power and low noise applications, such as mobile phones and personal digital assistants (PDAs). All inputs and outputs are equipped with protection circuits against static discharge, providing 2 kV ESD immunity and transient excess voltage protection.
The document provides detailed electrical characteristics, including DC and AC specifications for various supply voltages and temperatures. It includes pin settings, a truth table, and absolute maximum ratings. The device is available in DFN6L and SOT-665 packages.
| Operating voltage range | 1.2 to 3.6 V |
|---|---|
| Propagation delay (max) | 6.3 ns |
| Power dissipation (max) | 1 µA |
| Latch-up performance | 300 mA |
| ESD performance (Human Body Model) | 2000 V |
| ESD performance (Machine Model) | 200 V |
| ESD performance (Charged Device Model) | 1000 V |
| Supply voltage (absolute max) | -0.5 to +4.6 V |
| Operating temperature | -40 to 85 °C |
| Package types | DFN6L, SOT-665 |
The device operates in a voltage range of 1.2 to 3.6 V.
Yes, it has protection circuits against static discharge with 2 kV ESD immunity.
The device is available in DFN6L and SOT-665 packages.
It is ideal for mobile phones and personal digital assistants (PDAs).