Update: 28 September, 2023
HCF40103B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology. It consists of an 8-stage synchronous down counter with a single output that is active when the internal count is zero. This device contains a single 8-bit binary counter. It has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the CARRY-OUT/ZERO DETECT output are active-low logics. In normal operation, the counter is decremented by one count on each positive transition of the CLOCK. Counting is inhibited when the CARRY-IN/COUNTER ENABLE (CI/ CE) input is high. The CARRY-OUT/ZERO DETECT (CO/ZD) output goes low when the count reaches zero if the CI/CE input is low, and remains low for one full clock period. When the SYNCHRONOUS PRESET ENABLE (SPE) input is low, data at the JAM input is clocked into the counter on the next positive clock transition regardless of the state of the CI/CE input.
File format: PDF
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MD5 Checksum: 0A80D4D54F1CAF4D0120BABB720BD8C5
Publication date: 10 August, 2012
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PDF Link: ST HCF40103B handbook PDF